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64b 66b encoding wikipedia jump to content main menu main menu move to sidebar hide navigation main page contents current events random article about wikipedia contact us contribute help learn to edit community portal recent changes upload file special pages search search appearance donate create account log in personal tools donate create account log in contents move to sidebar hide top 1 function 2 properties and application toggle properties and application subsection 2 1 run length 2 2 dc balance 2 3 hamming distance 2 4 observations 2 5 variations 2 6 successors 3 technologies that use 64b 66b encoding 4 technologies that use 128b 1xxb encoding 5 technologies that use 256b 257b encoding 6 references 7 external links toggle the table of contents 64b 66b encoding 3 languages català deutsch français edit links article talk english read edit view history tools tools move to sidebar hide actions read edit view history general what links here related changes upload file permanent link page information cite this page get shortened url switch to legacy parser print export download as pdf printable version in other projects wikidata item appearance move to sidebar hide from wikipedia the free encyclopedia redirected from 128b 132b line code used in ethernet technologies this article includes a list of general references but lacks sufficient corresponding inline citations please help improve this article by introducing more precise citations january 2017 learn how and when to remove this message this article needs more citations please help improve this article by adding citations to reliable sources unsourced material may be challenged and removed find sources 64b 66b encoding news newspapers books scholar jstor june 2026 learn how and when to remove this message in data networking and transmission 64b 66b is a line code that transforms 64 bit data to 66 bit line code to provide enough state changes to allow reasonable clock recovery and alignment of the data stream at the receiver it was defined by the ieee 802 3 working group as part of the ieee 802 3ae 2002 amendment which introduced 10 gbit s ethernet at the time 64b 66b was deployed it allowed 10 gb ethernet to be transmitted over fiber optic with the same lasers used by sonet oc 192 rather than requiring the 12 5 gbit s lasers that were not expected when to be available for several years the protocol overhead of a coding scheme is the ratio of the number of raw payload bits to the number of raw payload bits plus the number of added coding bits the overhead of 64b 66b encoding is 2 coding bits for every 64 payload bits or 3 125 this is a considerable improvement on the 25 overhead of the previously used 8b 10b encoding scheme which added 2 coding bits to every 8 payload bits the overhead can be reduced further by doubling the payload size to produce the 128b 130b encoding used by pcie 3 0 function edit as its scheme name suggests 64 payload bits are encoded as a 66 bit entity the 66 bit entity is made by prefixing one of two possible 2 bit preambles to the 64 payload bits this 66 bit entity is now of two possible states if the preamble is 01 2 the 64 payload bits are data if the preamble is 10 2 the 64 payload bits hold an 8 bit type field and 56 bits of control information and or data the preambles 00 2 and 11 2 are not used and indicate an error if seen the use of the 01 2 and 10 2 preambles guarantees a bit transition every 66 bits which means that a continuous stream of 0s or 1s cannot be valid data it also allows easier clock timer synchronization as a transition must be seen every 66 bits the 64 bit payload is then scrambled using a self synchronous scrambler function scrambling is not intended to encrypt the data but to ensure that a relatively even distribution of 1s and 0s are found in the transmitted data the scrambler cannot guarantee that output data will never have a long run length of 0s or all 1s or other undesirable properties in communications but does allow strong statistical bounds to be put on the probability of such events practical designs will choose system parameters such that a bit error due to long run lengths is vanishingly unlikely this method is different from the code book based approach of 8b 10b encoding the encoding and scrambling are normally implemented entirely in hardware with the scrambler using a linear feedback shift register upper layers of the software stack need not be aware that the link layer is using these methods properties and application edit 64b 66b s design goals are clock recovery stream alignment dc balance transition density and run length 8b 10b encoding guarantees strict bounds on dc balance transition density and run length whereas 64b 66b provides statistical bounds on these properties run length edit most clock recovery circuits designed for sonet oc 192 and 64b 66b are specified to tolerate an 80 bit run length such a run cannot occur in 64b 66b because transitions are guaranteed at 66 bit intervals and in fact long runs are very unlikely although it is theoretically possible for a random data pattern to align with the scrambler state and produce a long run of 65 zeroes or 65 ones the probability of such an event is equal to flipping a fair coin and having it come up in the same state 64 times in a row at 10 gigabits per second the expected event rate of a 66 bit block with a 65 bit run length assuming random data is 66 2 64 10 10 2 seconds or about once every 1900 years the run length statistics may get worse if the data consists of specifically chosen patterns instead of being random an earlier scrambler used in packet over sonet sdh rfc 1619 1994 had a short polynomial with only 7 bits of internal state which allowed a malicious attacker to create a denial of service attack by transmitting patterns in all 2 7 1 states one of which was guaranteed to de synchronize the clock recovery circuits this vulnerability was kept secret until the scrambler length was increased to 43 bits rfc 2615 1999 making it impossible for a malicious attacker to jam the system with a short sequence 64b 66b avoided this vulnerability by using a scrambling polynomial with enough random internal state 58 bits so that a dedicated attacker using a crafted ethernet packet can only create a 64 bit run length in the scrambler output once in about 29 years 1 11 13 this creates 66 bit blocks containing 65 bit runs at a rate similar to using random data dc balance edit the dc balance of 64b 66b is not absolutely bounded however it can be shown that the scrambler output closely approximates a sequence of random binary bits passing such a sequence through an ac coupled circuit produces a baseline wander noise that follows a gaussian distribution and the impact on the system error rate can be statistically quantified in practice a modest coupling capacitor value of 1 nf in a 100 ω system is sufficient to guarantee that a dc drift of more than 2 5 will occur less often than once per 10 22 bits about 31 700 years at 10 gbit s 1 hamming distance edit 10 gigabit ethernet has a strict charter requiring a mean time to false packet acceptance mttfpa to be on the order of 1 billion years for a single operating link to achieve this at normal bit error rates requires at least a 4 bit hamming distance protection for all packet data in other words all combinations of 3 randomly spaced bit flips within a packet boundary must be detected and result in an invalidated packet several strategies were combined to achieve the 4 bit hamming distance for 64b 66b packets 1 strong type fields were chosen with 4 bit hamming distance 2 the scrambler polynomial was chosen to be compatible with the crc 32 used for packet protection and 3 protocol violations adjacent to the packet boundaries are required to invalidate the packet the combination of crc 32 and the chosen scrambler polynomial were evaluated by exhaustively enumerating all 4 bit error patterns for all possible packet sizes with an optimized c program observations edit the main contribution of 64b 66b is the observation that deterministic run length and transition density of 8b 10b are not always worth a 25 code overhead and that solid robust systems could be designed using statistically bounded methods at some point practical risks whether from mean time between failures mtbf of components such as power supplies or from phenomena such as cosmic rays or solar flares dominate the reliability of both 8b 10b and 64b 66b systems variations edit the interlaken protocol improves the dc balance further by trading off more coding bits its 64b 67b encoding extends 64b 66b with explicit dc balancing this may be beneficial for some applications such as using smaller on chip coupling capacitors pci express 3 0 introduced 128b 130b encoding which is similar to 64b 66b but has a payload of 128 bits instead of 64 bits and uses a different scrambling polynomial x 23 x 21 x 16 x 8 x 5 x 2 1 it is also not self synchronous and so requires explicit synchronization of seed values in contrast with 64b 66b usb 3 1 and displayport 2 0 use 128b 132b encoding which is identical to 64b 66b but duplicates each of the preamble bits to reduce the risk of undetected errors there successors edit for each n b n 2 b encoding the symbol data ratio is always below 1 with a ratio of 0 985 for 128b 130b encoding there is no real margin for improvement the following approaches are available to further increase the data rate higher symbol rates combined with fec very common are 512b 514b encodings combined with reed solomon error correction the following variants are often used rs 528 514 0 7 10 adding 14 correction bits to the 512b 514b code word allowing to correct up to 0 7 corrupted bits overhead is 3 same as 64b 66b encoding rs 544 514 14 10 adding 30 correction bits to the 512b 514b code word allowing to correct up to 15 corrupted bits overhead is 6 the fec allows symbol error rates of 2 3 10 5 or 2 2 10 4 to achieve a bit error rate of less than 10 15 in the transmitted data multi level encoding combined with fec further improvements are possible by switching from pam 2 to pam 4 or ensemble nrz coding multi level trellis modulation combined with fec technologies that use 64b 66b encoding edit 100 gigabit ethernet 10g epon 10 gbit s ethernet passive optical network 10 gigabit ethernet most varieties aurora from xilinx camera link hs common public radio interface fibre channel 10gfc and 16gfc infiniband thunderbolt jesd204c technologies that use 128b 1xxb encoding edit nvlink 1 0 pcie 3 x pcie 4 x pcie 5 x sata 3 2 sas 4 usb 3 1 gen2 usb4 displayport 2 0 technologies that use 256b 257b encoding edit fibre channel 32gfc gen 6 and higher references edit 1 2 walker rick dugan richard january 18 20 2000 64b 66b low overhead coding proposal for serial links pdf ieee 802 3 high speed study group external links edit 64b 66b low overhead coding proposal for serial links note that this is the original proposal to the ieee and some changes were made for the final agreed standard the circuit diagram for the 58 bit scrambling polynomial described in the proposal is identical to the one adopted in the standard however the proposal numbers the registers in reverse order such that the x 58 x 19 1 polynomial in the proposal is the same as the one labelled x 58 x 39 1 in the standard us patent us6650638 decoding method and decoder for 64b 66b coded packetized serial data us patent us6718491 coding method and coder for packetized serial data with low overhead us patent us7055073 coding method for coding packetized serial data with low overhead patentview ep1133123 software patent 64b 66b decoding for packetized serial data error correction on 64 66 bit encoded links introduction to 10 gigabit 64b 66b clause 49 a reference design by xilinx on 64b 66b encoding and scrambling aurora 64b66b ip core using 64b 66b encoding v t e line coding digital baseband transmission main articles unipolar encoding bipolar encoding on off keying mark and space basic line codes return to zero rz non return to zero level nrz nrz l non return to zero inverted nrz i non return to zero space nrz s manchester differential manchester biphase bi φ extended line codes conditioned diphase 4b3t 4b5b 2b1q alternate mark inversion modified ami code coded mark inversion mlt 3 encoding hybrid ternary code 6b 8b encoding 8b 10b encoding 64b 66b encoding eight to fourteen modulation delay miller encoding tc pam optical line codes carrier suppressed return to zero alternate phase return to zero see also baseband baud bit rate digital signal digital transmission ethernet physical layer pulse modulation methods pulse amplitude modulation pam pulse code modulation pcm serial communication category line codes retrieved from https en wikipedia org w index php title 64b 66b_encoding oldid 1357881940 categories encodings line codes telecommunications standards hidden categories articles with short description short description matches wikidata use mdy dates from september 2021 use american english from march 2019 all wikipedia articles written in american english articles lacking in text citations from january 2017 all articles lacking in text citations articles needing additional references from june 2026 all articles needing additional references all articles with vague or ambiguous time vague or ambiguous time from april 2021 this page was last edited on 5 june 2026 at 06 36 utc page was rendered with parsoid text is available under the creative commons attribution sharealike 4 0 license additional terms may apply by using this site you agree to the terms of use and privacy policy wikipedia is a registered trademark of the wikimedia foundation inc a non profit organization privacy policy about wikipedia disclaimers contact wikipedia legal safety contacts code of conduct developers statistics cookie statement mobile view search search toggle the table of contents 64b 66b encoding 3 languages add topic
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