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fastbus wikipedia jump to content main menu main menu move to sidebar hide navigation main page contents current events random article about wikipedia contact us contribute help learn to edit community portal recent changes upload file special pages search search appearance donate create account log in personal tools donate create account log in contents move to sidebar hide top 1 bus description 2 physical description 3 history 4 standards 5 references toggle the table of contents fastbus 2 languages русский tiếng việt edit links article talk english read edit view history tools tools move to sidebar hide actions read edit view history general what links here related changes upload file permanent link page information cite this page get shortened url switch to legacy parser print export download as pdf printable version in other projects wikidata item appearance move to sidebar hide from wikipedia the free encyclopedia this article needs more citations please help improve this article by adding citations to reliable sources unsourced material may be challenged and removed find sources fastbus news newspapers books scholar jstor june 2019 learn how and when to remove this message fastbus ieee 960 is a computer bus standard originally intended to replace computer automated measurement and control camac in high speed large scale data acquisition it is also a modular crate electronics standard commonly used in data acquisition systems in particle detectors bus description edit a fastbus system consists of one or more segments each segment may be a crate segment or a cable segment segments are connected together using a segment interconnect si a crate segment typically consists of a backplane with slots to hold up to 26 modules mounted in a 19 inch rack each module is typically a printed circuit board with a front panel similar to a blade pc modules are physically about 14 inches by 15 inches and may occupy one or more adjacent slots 1 small systems may consist of only one crate segment or a small number of independent crate segments connected directly to a central computer rather than using segment interconnects fastbus uses the emitter coupled logic ecl electrical standard which allows higher speed than ttl and generates less switching noise segments implement a 32 bit multiplexed address data bus which allows a larger address space than camac a module may be a master or slave there may be multiple masters in a segment masters arbitrate for control of the bus and then perform data transfers to or from slaves this allows for very fast read out of an entire segment by doing a chained block read from a master with a general purpose cpu each i o card will then assume mastership send its data and then hand off mastership to the next card in a sequence all without the overhead of the supervising board with the general purpose cpu cable segments are implemented using 32 bit wide parallel twisted pair cables and a differential signalling scheme the electrical standard allows regular ecl receiver chips but requires custom transmitter circuits which allow lines to be safely driven both high and low at the same time this feature is required by the arbitration logic full size crates hold 26 modules 1 each module may dissipate up to 70 w giving a total crate heat load of 1750 w modules require a 5 2 v supply for the ecl interface usually a separate 2 v supply for ecl termination and often a 5 v supply for ttl or cmos logic the fastbus standard also has 15 v and 15 v pins on the backplane which are typically fed with very small power supplies as most modules use very little 15 v or any at all special high capacity power supplies with large 15 v supplies would have to be used if modules drew large amounts of current on those rails crates typically have dedicated 200 a or 300 a switched mode power supplies providing current to the modules through multiple pins on the backplane connector a large installation typically has multiple racks each with three crates cooling and air handling are a significant issue as is the safe design of high current power distribution physical description edit a fastbus crate is quite a bit taller than other types of electronics crates the power supply for a fastbus crate is typically mounted below the crate rather than being integral for the crate itself taking up even more vertical rack space history edit fastbus was conceived as a replacement for camac in data acquisition systems limitations of camac were a slow bus speed limited bus width single bus controller and unwieldy inter crate communications the camac branch highway fastbus sought improvement in all these areas by using a faster bus logic ecl an asynchronous bus protocol and a sophisticated multi segment design at the time it seemed obvious that the way to get higher speed was a wide parallel bus since the logic for each bit was already as fast as the electronics allowed later developments have moved to high speed serial protocols such as sata leaving designs such as the fastbus serial segment as a technological dead end the ieee standard was originally approved in may 1984 fastbus was used in many high energy physics experiments during the 1980s principally at laboratories involved in the development of the standard these include cern slac fermilab brookhaven national laboratory and triumf fastbus has now largely been replaced by vmebus in smaller scale systems and by custom designs which have lower per channel cost in large systems the problems of manufacturing cable segment transmitter chips reliably together with the cable handling issues of the wide parallel bus contributed to the low usage of cable segments the system interconnect modules were also complex and expensive again discouraging cable segment use these problems together with the late development of inexpensive protocol chips hindered the expression of the full potential of fastbus multi segment architecture standards edit fastbus is described in the ieee standard 960 1986 ieee standard fastbus modular high speed data acquisition and control system the system on which the ieee standard is based us department of energy report doe er 0189 was developed by the nim committee of the us department of energy representatives of the esone committee of european laboratories and of other laboratories in europe and canada also contributed to the standard references edit 1 2 an introduction to fastbus fnal archived from the original on 23 september 2013 retrieved 21 september 2013 v t e technical and de facto standards for wired computer buses general system bus front side bus back side bus daisy chain control bus address bus bus contention bus mastering network on a chip plug and play double data rate quad data rate list of bus bandwidths standards ss 50 bus s 100 bus multibus unibus vaxbi mbus std bus smbus q bus europe card bus isa stebus zorro ii zorro iii camac fastbus lpc hp precision bus eisa vme vxi vxs vpx nubus turbochannel mca sbus vlb hp gsc bus infiniband ethernet upa pci pci extended pci x pxi pci express pcie agp compute express link cxl direct media interface dmi rapidio intel quickpath interconnect nvlink hypertransport infinity fabric intel ultra path interconnect coherent accelerator processor interface capi spacewire storage st 506 esdi sdi ipi smd floppy connector parallel ata pata bus and tag dssi hippi serial ata sata scsi parallel sas escon fibre channel ssa satae pci express via ahci or nvme logical device interface peripheral apple desktop bus atari sio dcb commodore bus hp il hil midi rs 232 rs 422 rs 423 rs 485 lightning dmx512 a ieee 488 gpib ieee 1284 parallel port ieee 1394 firewire uni o 1 wire i 2 c access bus pmbus smbus i3c spi d²b parallel scsi profibus usb camera link external pcie thunderbolt can bus audio adat lightpipe aes3 intel hd audio i 2 s madi mcasp s pdif toslink portable pc card expresscard embedded multidrop bus coreconnect amba axi wishbone slimbus interfaces are listed by their speed in the roughly ascending order so the interface at the end of each section should be the fastest category retrieved from https en wikipedia org w index php title fastbus oldid 1000713523 category computer buses hidden categories articles needing additional references from june 2019 all articles needing additional references use dmy dates from june 2019 this page was last edited on 16 january 2021 at 09 59 utc page was rendered with parsoid text is available under the creative commons attribution sharealike 4 0 license additional terms may apply by using this site you agree to the terms of use and privacy policy wikipedia is a registered trademark of the wikimedia foundation inc a non profit organization privacy policy about wikipedia disclaimers contact wikipedia legal safety contacts code of conduct developers statistics cookie statement mobile view search search toggle the table of contents fastbus 2 languages add topic