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perating systems 8 1 2 embedded operating systems 8 1 3 mobile device operating systems 8 1 4 desktop and server operating systems 8 2 64 bit operating systems 8 2 1 embedded operating systems 8 2 2 mobile device operating systems 8 2 3 desktop and server operating systems 8 3 porting to 32 or 64 bit arm operating systems 9 notes 10 see also 11 references 11 1 citations 11 2 bibliography 12 further reading 13 external links 13 1 architecture manuals 13 2 quick reference cards 13 2 1 instructions 13 2 2 opcodes history edit bbc micro edit main article bbc micro acorn computers first widely successful design was the bbc micro introduced in december 1981 this was a relatively conventional machine based on the mos technology 6502 cpu but ran at roughly double the performance of competing designs like the apple ii due to its use of faster dynamic random access memory dram typical dram of the era ran at about 2 mhz acorn arranged a deal with hitachi for a supply of faster 4 mhz parts 16 machines of the era generally shared memory between the processor and the framebuffer which allowed the processor to quickly update the contents of the screen without having to perform separate input output i o as the timing of the video display is exacting the video hardware had to have priority access to that memory due to a quirk of the 6502 s design the cpu left the memory untouched for half of the time thus by running the cpu at 1 mhz the video system could read data during those down times taking up the total 2 mhz bandwidth of the ram in the bbc micro the use of 4 mhz ram allowed the same technique to be used but running at twice the speed this allowed it to outperform any similar machine on the market 17 acorn business computer edit main article acorn business computer 1981 was also the year that the ibm personal computer was introduced using the recently introduced intel 8088 a 16 bit cpu compared to the 6502 s 8 bit design it offered higher overall performance its introduction changed the desktop computer market radically what had been largely a hobby and gaming market emerging over the prior five years began to change to a must have business tool where the earlier 8 bit designs simply could not compete even newer 32 bit designs were also coming to market such as the motorola 68000 18 and national semiconductor ns32016 19 acorn began considering how to compete in this market and produced a new paper design named the acorn business computer they set themselves the goal of producing a machine with ten times the performance of the bbc micro but at the same price 20 this would outperform and underprice the pc at the same time the recent introduction of the apple lisa brought the graphical user interface gui concept to a wider audience and suggested the future belonged to machines with a gui 21 the lisa however cost 9 995 as it was packed with support chips large amounts of memory and a hard disk drive all very expensive then 22 the engineers then began studying all of the cpu designs available their conclusion about the existing 16 bit designs was that they were a lot more expensive and were still a bit crap 23 offering only slightly higher performance than their bbc micro design they also almost always demanded a large number of support chips to operate even at that level which drove up the cost of the computer as a whole these systems would simply not hit the design goal 23 they also considered the new 32 bit designs but these cost even more and had the same issues with support chips 24 according to sophie wilson all the processors tested at that time performed about the same with about a 4 mbit second bandwidth 25 a two key events led acorn down the path to arm one was the publication of a series of reports from the university of california berkeley which suggested that a simple chip design could nevertheless have extremely high performance much higher than the latest 32 bit designs on the market 26 the second was a visit by steve furber and sophie wilson to the western design center a company run by bill mensch and his sister which had become the logical successor to the mos team and was offering new versions like the wdc 65c02 the acorn team saw high school students producing chip layouts on apple ii machines which suggested that anyone could do it 27 28 in contrast a visit to another design firm working on modern 32 bit cpu revealed a team with over a dozen members which were already on revision h of their design and yet it still contained bugs b this cemented their late 1983 decision to begin their own cpu design the acorn risc machine 29 design concepts edit the original berkeley risc designs were in some sense teaching systems not designed specifically for outright performance to the risc s basic register heavy and load store concepts arm added a number of the well received design notes of the 6502 primary among them was the ability to quickly serve interrupts which allowed the machines to offer reasonable input output performance with no added external hardware to offer interrupts with similar performance as the 6502 the arm design limited its physical address space to 64 mb of total addressable space requiring 26 bits of address as instructions were 4 bytes 32 bits long and required to be aligned on 4 byte boundaries the lower 2 bits of an instruction address were always zero this meant the program counter pc only needed to be 24 bits allowing it to be stored along with the eight bit processor flags in a single 32 bit register that meant that upon receiving an interrupt the entire machine state could be saved in a single operation whereas had the pc been a full 32 bit value it would require separate operations to store the pc and the status flags this decision halved the interrupt overhead 30 another change and among the most important in terms of practical real world performance was the modification of the instruction set to take advantage of page mode dram recently introduced page mode allowed subsequent accesses of memory to run twice as fast if they were roughly in the same location or page in the dram chip berkeley s design did not consider page mode and treated all memory equally the arm design added special vector like memory access instructions the s cycles that could be used to fill or save multiple registers in a single page using page mode this doubled memory performance when they could be used and was especially important for graphics performance 31 the berkeley risc designs used register windows to reduce the number of register saves and restores performed in procedure calls the arm design did not adopt this wilson developed the instruction set writing a simulation of the processor in bbc basic that ran on a bbc micro with a second 6502 processor 32 33 this convinced acorn engineers they were on the right track wilson approached acorn s ceo hermann hauser and requested more resources hauser gave his approval and assembled a small team to design the actual processor based on wilson s isa 34 the official acorn risc machine project started in october 1983 arm1 edit arm1 2nd processor for the bbc micro acorn chose vlsi technology as the silicon partner as they were a source of roms and custom chips for acorn acorn provided the design and vlsi provided the layout and production the first samples of arm silicon worked properly when first received and tested on 26 april 1985 5 known as arm1 these versions ran at 6 mhz 35 the first arm application was as a second processor for the bbc micro where it helped in developing simulation software to finish development of the support chips vidc ioc memc and sped up the cad software used in arm2 development wilson subsequently rewrote bbc basic in arm assembly language the in depth knowledge gained from designing the instruction set enabled the code to be very dense making arm bbc basic an extremely good test for any arm emulator arm2 edit the result of the simulations on the arm1 boards led to the late 1986 introduction of the arm2 design running at 8 mhz and the early 1987 speed bumped version at 10 to 12 mhz c a significant change in the underlying architecture was the addition of a booth multiplier whereas formerly multiplication had to be carried out in software 37 further a new fast interrupt request mode fiq for short allowed registers 8 through 14 to be replaced as part of the interrupt itself this meant fiq requests did not have to save out their registers further speeding interrupts 38 the arm2 was roughly seven times the performance of a typical 7 mhz 68000 based system like the commodore amiga or macintosh se it was twice as fast as an intel 80386 running at 16 mhz and about the same speed as a multi processor vax 11 784 superminicomputer the only systems that beat it were the sun sparc and mips r2000 risc based workstations 39 further as the cpu was designed for high speed i o it dispensed with many of the support chips seen in these machines notably it lacked any dedicated direct memory access dma controller which was often found on workstations the graphics system was also simplified based on the same set of underlying assumptions about memory and timing the result was a dramatically simplified design offering performance on par with expensive workstations but at a price point similar to contemporary desktops 39 the arm2 featured a 32 bit data bus 26 bit address space and 27 32 bit registers of which 16 are accessible at any one time including the pc 40 the arm2 had a transistor count of just 30 000 41 compared to motorola s six year older 68000 model with around 68 000 much of this simplicity came from the lack of microcode which represents about one quarter to one third of the 68000 s transistors and the lack of like most cpus of the day a cache this simplicity enabled the arm2 to have low power consumption yet offer better performance than the intel 80286 clarification needed a successor arm3 was produced with a 4 kb cache which further improved performance 42 the address bus was extended to 32 bits in the arm6 but program code still had to lie within the first 64 mb of memory in 26 bit compatibility mode due to the reserved bits for the status flags 43 advanced risc machines ltd arm6 edit microprocessor based system on a chip die of an arm610 microprocessor in the late 1980s apple computer and vlsi technology started working with acorn on newer versions of the arm core in 1990 acorn spun off the design team into a new company named advanced risc machines ltd 44 45 46 which became arm ltd when its parent company arm holdings plc floated on the london stock exchange and nasdaq in 1998 47 the new apple arm work would eventually evolve into the arm6 first released in early 1992 apple used the arm6 based arm610 as the basis for their apple newton pda early licensees edit in 1994 acorn used the arm610 as the main central processing unit cpu in their riscpc computers dec licensed the armv4 architecture and produced the strongarm 48 at 233 mhz this cpu drew only one watt newer versions draw far less this work was later passed to intel as part of a lawsuit settlement and intel took the opportunity to supplement their i960 line with the strongarm intel later developed its own high performance implementation named xscale which it has since sold to marvell transistor count of the arm core remained essentially the same throughout these changes arm2 had 30 000 transistors 49 while arm6 grew only to 35 000 50 market share edit in 2005 about 98 of all mobile phones sold used at least one arm processor 51 in 2010 producers of chips based on arm architectures reported shipments of 6 1 billion arm based processors representing 95 of smartphones 35 of digital televisions and set top boxes and 10 of mobile computers in 2011 the 32 bit arm architecture was the most widely used architecture in mobile devices and the most popular 32 bit one in embedded systems 52 in 2013 10 billion were produced 53 and arm based chips are found in nearly 60 percent of the world s mobile devices 54 licensing edit see also arm company licensees die of a stm32f103vgt6 arm cortex m3 microcontroller with 1 mb flash memory by stmicroelectronics core licence edit arm ltd s primary business is selling ip cores which licensees use to create microcontrollers mcus cpus and systems on chips based on those cores the original design manufacturer combines the arm core with other parts to produce a complete device typically one that can be built in existing semiconductor fabrication plants fabs at low cost and still deliver substantial performance the most successful implementation has been the arm7tdmi with hundreds of millions sold atmel has been a precursor design center in the arm7tdmi based embedded system the arm architectures used in smartphones pdas and other mobile devices range from armv5 to armv8 a in 2009 some manufacturers introduced netbooks based on arm architecture cpus in direct competition with netbooks based on intel atom 55 arm ltd offers a variety of licensing terms varying in cost and deliverables arm ltd provides to all licensees an integratable hardware description of the arm core as well as complete software development toolset compiler debugger software development kit and the right to sell manufactured silicon containing the arm cpu soc packages integrating arm s core designs include nvidia tegra s first three generations csr plc s quatro family st ericsson s nova and novathor silicon labs s precision32 mcu texas instruments s omap products samsung s hummingbird and exynos products apple s a4 a5 and a5x and nxp s i mx fabless licensees who wish to integrate an arm core into their own chip design are usually only interested in acquiring a ready to manufacture verified semiconductor intellectual property core for these customers arm ltd delivers a gate netlist description of the chosen arm core along with an abstracted simulation model and test programs to aid design integration and verification more ambitious customers including integrated device manufacturers idm and foundry operators choose to acquire the processor ip in synthesizable rtl verilog form with the synthesizable rtl the customer has the ability to perform architectural level optimisations and extensions this allows the designer to achieve exotic design goals not otherwise possible with an unmodified netlist high clock speed very low power consumption instruction set extensions etc while arm ltd does not grant the licensee the right to resell the arm architecture itself licensees may freely sell manufactured products such as chip devices evaluation boards and complete systems merchant foundries can be a special case not only are they allowed to sell finished silicon containing arm cores they generally hold the right to re manufacture arm cores for other customers arm ltd prices its ip based on perceived value lower performing arm cores typically have lower licence costs than higher performing cores in implementation term...