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tanvir, niknejad, ali, department, california, berkeley, cmg, 106, 0beta, compact, cheng, yuhua, 1999, 7923, 8575, bsim3, user, guide, shichman, hodges, 289, 1109, jssc, 1049902, 1968ijssc, 285s, 285, 090507, brunningsoftware, verlag, 321, 34258, incompatibility, 1961, 596, 0209, 1142, 9789814503464_0076, 583, memorandum, laboratories, ire, aiee, bassett, knox, 8018, 8639, johns, 322, 3540342588, deal, bruce, 183, 1566771931, highlights, 136, 1016, 90219, 1960jpcs, 131l


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of charge concentration by a mos capacitance between a body electrode and a gate electrode located above the body and insulated from all other device regions by a gate dielectric layer if dielectrics other than an oxide are employed the device may be referred to as a metal insulator semiconductor fet misfet compared to the mos capacitor the mosfet includes two additional terminals source and drain each connected to individual highly doped regions that are separated by the body region these regions can be either p or n type but they must both be of the same type and of opposite type to the body region the source and drain unlike the body are highly doped as signified by a sign after the type of doping if the mosfet is an n channel or nmos fet then the source and drain are n regions and the body is a p region if the mosfet is a p channel or pmos fet then the source and drain are p regions and the body is a n region the source is so named because it is the source of the charge carriers electrons for n channel holes for p channel that flow through the channel similarly the drain is where the charge carriers leave the channel the occupancy of the energy bands in a semiconductor is set by the position of the fermi level relative to the semiconductor energy band edges see also depletion region with sufficient gate voltage the valence band edge is driven far from the fermi level and holes from the body are driven away from the gate at larger gate bias still near the semiconductor surface the conduction band edge is brought close to the fermi level populating the surface with electrons in an inversion layer or n channel at the interface between the p region and the oxide this conducting channel extends between the source and the drain and current is conducted through it when a voltage is applied between the two electrodes increasing the voltage on the gate leads to a higher electron density in the inversion layer and therefore increases the current flow between the source and drain for gate voltages below the threshold value the channel is lightly populated and only a very small subthreshold leakage current can flow between the source and the drain when a negative gate source voltage positive source gate is applied it creates a p channel at the surface of the n region analogous to the n channel case but with opposite polarities of charges and voltages when a voltage less negative than the threshold value a negative voltage for the p channel is applied between gate and source the channel disappears and only a very small subthreshold current can flow between the source and the drain the device may comprise a silicon on insulator device in which a buried oxide is formed below a thin semiconductor layer if the channel region between the gate dielectric and the buried oxide region is very thin the channel is referred to as an ultrathin channel region with the source and drain regions formed on either side in or above the thin semiconductor layer other semiconductor materials may be employed when the source and drain regions are formed above the channel in whole or in part they are referred to as raised source drain regions comparison of n and p type mosfets 31 parameter nmos fet pmos fet source drain type n type p type channel type mos capacitor n type p type gate type polysilicon n p metal φ m si conduction band φ m si valence band well type p type n type threshold voltage v th positive enhancement negative depletion negative enhancement positive depletion band bending downwards upwards inversion layer carriers electrons holes substrate type p type n type modes of operation source tied to the body to ensure no body bias top left subthreshold top right ohmic mode bottom left active mode at onset of pinch off bottom right active mode well into pinch off channel length modulation evident when the switch is closed the n channel mosfet s gate raises above its threshold voltage so the mosfet then will conduct current to light the led 32 the operation of a mosfet can be separated into three different modes depending on the device s threshold voltage v th displaystyle v_ text th gate to source voltage v gs displaystyle v_ text gs and drain to source voltage v ds displaystyle v_ text ds in the following discussion a simplified algebraic model is used 33 modern mosfet characteristics are more complex than the algebraic model presented here 34 for an enhancement mode n channel mosfet the three operational modes are cutoff subthreshold and weak inversion mode criterion v gs v th displaystyle v_ text gs v_ text th according to the basic threshold model the transistor is turned off and there is no conduction between drain and source a more accurate model considers the effect of thermal energy on the fermi dirac distribution of electron energies which allow some of the more energetic electrons at the source to enter the channel and flow to the drain this results in a subthreshold current that is an exponential function of gate source voltage while the current between drain and source should ideally be zero when the transistor is being used as a turned off switch there is a weak inversion current sometimes called subthreshold leakage in weak inversion where the source is tied to bulk the current varies exponentially with v gs displaystyle v_ text gs as given approximately by 35 36 i d i d0 e v gs v th n v t displaystyle i_ text d approx i_ text d0 e frac v_ text gs v_ text th nv_ text t where i d0 displaystyle i_ text d0 is the current when v gs v th displaystyle v_ text gs v_ text th v t k t q displaystyle v_ text t kt q is the thermal voltage and n displaystyle n is the slope factor given by n 1 c dep c ox displaystyle n 1 frac c_ text dep c_ text ox where c dep displaystyle c_ text dep is the capacitance of the depletion layer and c ox displaystyle c_ text ox is the capacitance of the oxide layer this equation is generally used but is only an adequate approximation for the source tied to the bulk for the source not tied to the bulk the subthreshold equation for drain current in saturation is 37 38 i d i d0 e v g v th n v t e v s v t displaystyle i_ text d approx i_ text d0 e frac v_ text g v_ text th nv_ text t e frac v_ text s v_ text t in a long channel device there is no drain voltage dependence of the current once v ds v t displaystyle v_ text ds gg v_ text t but as channel length is reduced drain induced barrier lowering introduces drain voltage dependence that depends in a complex way upon the device geometry for example the channel doping the junction doping and so on frequently threshold voltage v th for this mode is defined as the gate voltage at which a selected value of current i d0 occurs for example i d0 1 μa which may not be the same v th value used in the equations for the following modes some micropower analog circuits are designed to take advantage of subthreshold conduction 39 40 41 by working in the weak inversion region the mosfets in these circuits deliver the highest possible transconductance to current ratio namely g m i d 1 n v t displaystyle g_ m i_ text d 1 left nv_ text t right almost that of a bipolar transistor 42 the subthreshold i v curve depends exponentially upon threshold voltage introducing a strong dependence on any manufacturing variation that affects threshold voltage for example variations in oxide thickness junction depth or body doping that change the degree of drain induced barrier lowering the resulting sensitivity to fabricational variations complicates optimization for leakage and performance 43 44 mosfet drain current vs drain to source voltage for several values of v gs v th displaystyle v_ text gs v_ text th the boundary between linear ohmic and saturation active modes is indicated by the upward curving parabola cross section of a mosfet operating in the linear ohmic region strong inversion region present even near drain cross section of a mosfet operating in the saturation active region channel exhibits channel pinching near drain triode mode or linear region also known as the ohmic mode criteria v gs v th displaystyle v_ text gs v_ text th and v ds v gs v th displaystyle v_ text ds v_ text gs v_ text th the transistor is turned on and a channel has been created which allows current between the drain and the source the mosfet operates like a resistor controlled by the gate voltage relative to both the source and drain voltages the current from drain to source is modeled as i d μ n c ox w l v gs v t h v ds v ds 2 2 displaystyle i_ text d mu _ n c_ text ox frac w l left left v_ text gs v_ rm th right v_ text ds frac v_ text ds 2 2 right where μ n displaystyle mu _ n is the charge carrier effective mobility w displaystyle w is the gate width l displaystyle l is the gate length and c ox displaystyle c_ text ox is the gate oxide capacitance per unit area the transition from the exponential subthreshold region to the triode region is not as sharp as the equations suggest 45 46 verification needed saturation or active mode criteria v gs v th displaystyle v_ text gs v_ text th and v ds v gs v th displaystyle v_ text ds geq v_ text gs v_ text th the switch is turned on and a channel has been created which allows current between the drain and source since the drain voltage is higher than the source voltage the electrons spread out and conduction is not through a narrow channel but through a broader two or three dimensional current distribution extending away from the interface and deeper in the substrate the onset of this region is also known as pinch off to indicate the lack of channel region near the drain although the channel does not extend the full length of the device the electric field between the drain and the channel is very high and conduction continues the drain current is now weakly dependent upon drain voltage and controlled primarily by the gate source voltage and modeled approximately as i d μ n c ox 2 w l v gs v th 2 1 λ v ds displaystyle i_ text d frac mu _ n c_ text ox 2 frac w l left v_ text gs v_ text th right 2 left 1 lambda v_ text ds right the additional factor involving λ the channel length modulation parameter models current dependence on drain voltage due to the early effect or channel length modulation according to this equation a key design parameter the mosfet transconductance is g m i d v gs 2 i d v gs v th 2 i d v ov displaystyle g_ m frac partial i_ d partial v_ text gs frac 2i_ text d v_ text gs v_ text th frac 2i_ text d v_ text ov where the combination v ov v gs v th is called the overdrive voltage 47 and where v dssat v gs v th accounts for a small discontinuity in i d displaystyle i_ text d which would otherwise appear at the transition between the triode and saturation regions another key design parameter is the mosfet output resistance r out given by r out 1 λ i d displaystyle r_ text out frac 1 lambda i_ text d note r out is the inverse of g ds where g ds i ds v ds displaystyle g_ text ds frac partial i_ text ds partial v_ text ds i d is the expression in the saturation region if λ is taken as zero an infinite output resistance of the device results that leads to unrealistic circuit predictions particularly in analog circuits as the channel length becomes very short these equations become quite inaccurate new physical effects arise for example carrier transport in the active mode may become limited by velocity saturation when velocity saturation dominates the saturation drain current is more nearly linear than quadratic in v gs at even shorter lengths carriers transport with near zero scattering known as quasi ballistic transport in the ballistic regime the carriers travel at an injection velocity that may exceed the saturation velocity and approaches the fermi velocity at high inversion charge density in addition drain induced barrier lowering increases off state cutoff current and requires an increase in threshold voltage to compensate which in turn reduces the saturation current 48 49 verification needed body effect main article body effect band diagram showing body effect v sb splits fermi levels f n for electrons and f p for holes requiring larger v gb to populate the conduction band in an nmos mosfet the occupancy of the energy bands in a semiconductor is set by the position of the fermi level relative to the semiconductor energy band edges application of a source to substrate reverse bias of the source body pn junction introduces a split between the fermi levels for electrons and holes moving the fermi level for the channel further from the band edge lowering the occupancy of the channel the effect is to increase the gate voltage necessary to establish the channel as seen in the figure this change in channel strength by application of reverse bias is called the body effect using an nmos example the gate to body bias v gb positions the conduction band energy levels while the source to body bias v sb positions the electron fermi level near the interface deciding occupancy of these levels near the interface and hence the strength of the inversion layer or channel the body effect upon the channel can be described using a modification of the threshold voltage approximated by the following equation v tb v t 0 γ v sb 2 φ b 2 φ b displaystyle v_ text tb v_ t0 gamma left sqrt v_ text sb 2 varphi _ b sqrt 2 varphi _ b right where v tb is the threshold voltage with substrate bias present and v t0 is the zero v sb value of threshold voltage γ displaystyle gamma is the body effect parameter and 2 φ b is the approximate potential drop between surface and bulk across the depletion layer when v sb 0 and gate bias is sufficient to ensure that a channel is present 50 as this equation shows a reverse bias v sb 0 causes an increase in threshold voltage v tb and therefore demands a larger gate voltage before the channel populates the body can be operated as a second gate and is sometimes referred to as the back gate the body effect is sometimes called the back gate effect 51 circuit symbols a variety of symbols are used for the mosfet the basic design is generally a line for the channel with the source and drain leaving it at right angles and then bending back at right angles into the same direction as the channel sometimes three line segments are used for enhancement mode and a solid line for depletion mode see depletion and enhancement modes another line is drawn parallel to the channel for the gate a 4 terminal nmos has two intrinsic body diodes due to the body to drain and body to source p n junctions in pmos these diodes are reversed the body to source diode is made irrelevant by shorting the body to the source in 3 terminal devices the remaining body to drain diode prevents the nmos from blocking source to drain current and is used in some dc to dc converters 52 the bulk or body connection if shown is shown connected to the back of the channel with an arrow indicating pmos or nmos this arrow always points from p to n so an nmos n channel in p well or p substrate has...
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