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the (933), cache (604), and (288), memory (176), for (145), data (125), caches (110), with (107), that (103), from (100), #address (90), #virtual (89), are (84), which (79), instruction (77), this (70), have (67), can (66), cpu (62), associative (62), processor (60), main (60), physical (59), way (58), edit (58), one (58), used (57), level (55), has (54), set (53), not (49), intel (48), tag (45), core (44), performance (43), two (42), each (41), bits (39), bit (38), instructions (37), access (36), retrieved (35), tlb (35), also (35), read (35), system (34), index (33), pdf (32), kib (32), may (31), was (31), chip (31), write (31), there (31), some (31), page (30), entry (30), but (30), into (28), time (28), location (28), more (28), than (28), use (27), computer (27), size (27), processors (27), only (27), tags (27), other (26), when (26), ibm (25), mapped (25), first (25), miss (25), line (25), all (24), different (24), unit (24), multi (24), larger (24), same (23), pages (23), block (23), high (22), direct (22), power (21), architecture (21), been (21), original (21), speed (21), addresses (21), mib (21), both (21), blocks (21), hierarchy (20), archived (20), number (20), per (19), between (19), latency (19), because (19), however (19), hardware (18), its (18), associativity (18), micro (18), most (18), any (18), lines (18), hit (18), cores (18), cpus (17), branch (17), translation (17), shared (17), they (17), multiple (17), design (16), register (16), store (16), doi (16), operation (16), amd (16), were (16), much (16), virtually (16), then (16), locations (16), program (15), systems (15), article (15), sram (15), does (15), fetch (15), indexed (15), entries (15), misses (15), policy (14), processing (14), four (14), possible (14), space (14), physically (14), such (14), usually (14), generally (14), called (14), replacement (13), policies (13), single (13), execution (13), machine (13), another (13), part (13), 2013 (13), operating (13), had (13), levels (13), early (13), these (13), faster (13), byte (13), since (13), tagged (13), must (13), will (13), mapping (13), buffer (12), pipeline (12), stored (12), based (12), trace (12), pentium (12), large (12), example (12), least (12), before (12), those (12), table (11), value (11), rate (11), 128 (11), microarchitecture (11), caching (11), very (11), inclusive (11), well (11), fast (11), see (11), where (11), area (11), microprocessors (11), die (11), motherboard (11), split (11), need (11), separate (11), cached (11), μop (11), available (10), microprocessor (10), management (10), mmu (10), low (10), order (10), 360 (10), arm (10), conflict (10), 2012 (10), 2014 (10), small (10), new (10), major (10), would (10), ram (10), through (10), sizes (10), victim (10), after (10), eight (10), modern (10), having (10), thus (10), implemented (10), decoded (10), using (9), non (9), model (9), history (9), 256 (9), several (9), times (9), international (9), 1990 (9), exclusive (9), information (9), case (9), designs (9), advantage (9), slower (9), either (9), above (9), typically (9), ways (9), keep (9), copies (9), copy (9), smaller (9), require (9), many (9), toggle (8), computing (8), control (8), target (8), bus (8), scratchpad (8), cycle (8), secondary (8), 2009 (8), symposium (8), software (8), work (8), cost (8), skewed (8), stores (8), fetched (8), edram (8), common (8), their (8), hints (8), hint (8), although (8), simple (8), like (8), unified (8), accesses (8), rather (8), specialized (8), include (8), coloring (8), problem (8), multicolumn (8), contents (7), wikipedia (7), cs1 (7), 2010 (7), 2008 (7), deprecated (7), service (7), general (7), dynamic (7), application (7), package (7), types (7), second (7), x86 (7), external (7), 1109 (7), proceedings (7), conference (7), 2020 (7), 1145 (7), problems (7), isbn (7), 2015 (7), cite (7), anandtech (7), 2001 (7), length (7), september (7), uses (7), given (7), allows (7), important (7), just (7), dram (7), three (7), bytes (7), while (7), path (7), few (7), function (7), evicted (7), fewer (7), known (7), become (7), color (7), colors (7), tagging (7), requires (7), offset (7), valid (7), flag (7), code (6), last (6), december (6), 2023 (6), org (6), module (6), clock (6), integrated (6), decoder (6), registers (6), predictor (6), load (6), coherence (6), graphics (6), operations (6), cycles (6), prediction (6), random (6), written (6), november (6), ieee (6), s2cid (6), smart (6), haswell (6), fully (6), gap (6), tlbs (6), help (6), total (6), placement (6), effectively (6), recently (6), still (6), significant (6), form (6), extra (6), taken (6), programs (6), needed (6), later (6), determine (6), requested (6), often (6), until (6), whether (6), among (6), map (6), simpler (6), structure (6), run (6), longer (6), hold (6), makes (6), delay (6), particular (6), selected (6), lower (6), below (6), back (6), hash (6), dirty (6), log (6), due (6), subsection (6), search (5), links (5), articles (5), march (5), maint (5), archival (5), central (5), quantum (5), file (5), logic (5), lookaside (5), variable (5), word (5), thread (5), wide (5), issue (5), out (5), risc (5), alpha (5), mips (5), sets (5), turing (5), what (5), 2003 (5), family (5), solutions (5), parallel (5), com (5), introduction (5), link (5), pro (5), 978 (5), bridge (5), atlas (5), over (5), technology (5), reduced (5), llc (5), fetching (5), instead (5), added (5), iii (5), board (5), next (5), implementation (5), being (5), rates (5), could (5), improve (5), right (5), released (5), following (5), provided (5), done (5), various (5), associated (5), checking (5), checked (5), make (5), takes (5), means (5), result (5), better (5), ptes (5), storing (5), allow (5), match (5), get (5), patterns (5), full (5), needs (5), reduce (5), aliases (5), existing (5), vipt (5), contains (5), pseudo (5), evict (5), about (4), additional (4), terms (4), august (4), statements (4), short (4), security (4), electronics (4), purpose (4), signal (4), functional (4), magnitude (4), pipelined (4), speculative (4), process (4), scalar (4), isa (4), itanium (4), sparc (4), series (4), automaton (4), technologies (4), flushing (4), 2004 (4), reference (4), acm (4), xeon (4), 1968 (4), october (4), cortex (4), 2007 (4), hierarchies (4), advanced (4), techniques (4), web (4), iris (4), 2011 (4), 2016 (4), frontend (4), david (4), decode (4), uop (4), optimization (4), zhang (4), slice (4), scheme (4), predicting (4), fact (4), approach (4), works (4), tables (4), every (4), ported (4), accessing (4), benefit (4), tools (4), energy (4), recent (4), current (4), depending (4), type (4), unusually (4), introduced (4), dynamically (4), became (4), included (4), directly (4), chips (4), loop (4), special (4), implementations (4), complex (4), fastest (4), might (4), similar (4), against (4), compared (4), reads (4), diagram (4), indexing (4), reading (4), higher (4), content (4), keeps (4), ensure (4), coherency (4), predictors (4), kinds (4), parity (4), effective (4), maps (4), athlon (4), comparable (4), hits (4), versus (4), highest (4), increasing (4), accessed (4), reducing (4), complexity (4), protocols (4), amount (4), off (4), examples (4), actual (4), without (4), avoiding (4), wcc (4), writes (4), already (4), guarantee (4), alternatively (4), changes (4), mappings (4), difficult (4), within (4), differences (4), best (4), aliasing (4), less (4), hide (4), move (4), sidebar (4), mobile (3), view (3), organization (3), long (3), unsourced (3), array (3), digital (3), related (3), frequency (3), switch (3), sum (3), addressed (3), adder (3), counter (3), sequential (3), controller (3), point (3), generation (3), others (3), 512 (3), network (3), gpu (3), multiprocessor (3), embedded (3), vector (3), updates (3), simultaneous (3), algorithm (3), false (3), sharing (3), stall (3), dec (3), comparison (3), edge (3), specific (3), storage (3), cellular (3), machines (3), queue (3), review (3), updated (3), simulation (3), smith (3), introduces (3), capacity (3), annual (3), product (3), world (3), james (3), overview (3), 486 (3), corporation (3), microcomputer (3), 2nd (3), characteristics (3), joint (3), third (3), february (3), 645 (3), manual (3), technical (3), analysis (3), usa (3), jouppi (3), norman (3), sigarch (3), news (3), tested (3), 2006 (3), april (3), 2018 (3), how (3), real (3), bulldozer (3), programmers (3), compiler (3), buffers (3), 2024 (3), lake (3), multicore (3), computers (3), john (3), selection (3), shown (3), advantages (3), conventional (3), consumption (3), atom (3), 1976 (3), memories (3), intended (3), idea (3), placed (3), loops (3), 2021 (3), simulator (3), algorithms (3), request (3), efficiency (3), apple (3), feature (3), uncommon (3), find (3), took (3), slightly (3), mhz (3), located (3), devices (3), 68k (3), documented (3), especially (3), found (3), smallest (3), largest (3), subset (3), occurred (3), rows (3), pair (3), simplest (3), select (3), sometimes (3), loaded (3), even (3), making (3), addressable (3), coherent (3), ecc (3), predict (3), branches (3), them (3), banks (3), sections (3), ten (3), always (3), local (3), instance (3), intermediate (3), present (3), certain (3), should (3), cray (3), itself (3), down (3), l1i (3), holds (3), providing (3), required (3), traces (3), fixed (3), decreasing (3), coalescing (3), points (3), technique (3), during (3), likely (3), pattern (3), lead (3), necessary (3), described (3), flushed (3), changed (3), becomes (3), solved (3), writing (3), synonym (3), homonym (3), historically (3), lookup (3), choice (3), r6000 (3), looked (3), vivt (3), refer (3), context (3), implement (3), comparing (3), cause (3), continue (3), invalid (3), stale (3), row (3), closer (3), lru (3), transistors (3), places (3), doubling (3), choose (3), waiting (3), stalls (3), checks (3), exception (3), settle (3), topic (2), languages (2), contact (2), privacy (2), wikimedia (2), commons (2), categories (2), wayback (2), disputed (2), accuracy (2), description (2), wikidata (2), pin (2), semiconductor (2), device (2), ppw (2), watt (2), voltage (2), scaling (2), circuit (2), circuitry (2), barrel (2), shifter (2), datapath (2), stack (2), gate (2), floating (2), fifo (2), heterogeneous (2), count (2), slicing (2), image (2), coprocessor (2), stream (2), transistor (2), temporal (2), multithreading (2), task (2), pipelining (2), parallelism (2), renaming (2), structural (2), hazards (2), classic (2), visc (2), motorola (2), addressing (2), architectures (2), finite (2), state (2), models (2), lecture (2), power4 (2), understanding (2), introductory (2), 2002 (2), hill (2), paper (2), results (2), benchmarks (2), net (2), describing (2), cacti (2), foster (2), chen (2), june (2), a22 (2), 6916 (2), 1964 (2), 6600 (2), 1999 (2), bottleneck (2), 123 (2), hotchips (2), cluster (2), tian (2), 5200 (2), 4950hq (2), difference (2), leon (2), cutress (2), ian (2), zen (2), shimpi (2), anand (2), lal (2), islped (2), aware (2), kanter (2), sandy (2), continued (2), agner (2), guide (2), ghz (2), skylake (2), desktop (2), products (2), formerly (2), improving (2), 17th (2), isca (2), jiang (2), lin (2), xiaodong (2), george (2), mechanism (2), journal (2), citeseerx (2), vol (2), 1962 (2), ifip (2), congress (2), patterson (2), hennessy (2), interface (2), choosing (2), error (2), protection (2), patents (2), justia (2), patent (2), issued (2), 1994 (2), reconfigurable (2), 1997 (2), schemes (2), ryan (2), codenamed (2), ivy (2), networks (2), z13 (2), throughput (2), 1982 (2), developed (2), cambridge (2), sequence (2), slave (2), give (2), effect (2), communication (2), references (2), notes (2), allocation (2), locality (2), serve (2), traditional (2), normally (2), whereas (2), connected (2), entirely (2), average (2), consider (2), research (2), 192 (2), laptop (2), variant (2), serves (2), crystalwell (2), again (2), tens (2), popularity (2), socket (2), obsolete (2), began (2), onto (2), sockets (2), made (2), growing (2), versions (2), 386 (2), amounts (2), expensive (2), around (2), left (2), 68040 (2), 68020 (2), mode (2), considered (2), tiny (2), replaced (2), true (2), 1980s (2), introduce (2), price (2), closely (2), semi (2), conductor (2), mainframe (2), 1960s (2), flat (2), extensive (2), values (2), depend (2), greatly (2), needing (2), citation (2), decoders (2), hinted (2), width (2), recurrence (2), translated (2), finally (2), srams (2), shows (2), matching (2), calculated (2), portion (2), retired (2), tends (2), sensitive (2), great (2), silicon (2), currently (2), change (2), guaranteed (2), terminology (2), primary (2), never (2), fill (2), keeping (2), translate (2), marking (2), date (2), specialization (2), here (2), reduces (2), strictly (2), check (2), together (2), disadvantage (2), whenever (2), corresponding (2), quite (2), name (2), separately (2), meaning (2), benefits (2), including (2), ranges (2), independently (2), resulting (2), reasons (2), allowing (2), share (2), question (2), implementing (2), files (2), did (2), end (2), scheduled (2), allocates (2), nest (2), phenom (2), features (2), along (2), returned (2), cases (2), replacing (2), fundamental (2), tradeoff (2), operate (2), dedicated (2), equal (2), method (2), powered (2), delivering (2), enough (2), causing (2), created (2), heuristic (2), l1d (2), basic (2), extreme (2), commonly (2), property (2), role (2), server (2), probes (2), mentioned (2), 6000 (2), attempt (2), assign (2), simply (2), extremely (2), collide (2), arrange (2), literature (2), community (2), cannot (2), consistent (2), timing (2), perhaps (2), suffers (2), determining (2), alternate (2), matches (2), distinguish (2), simultaneously (2), perfect (2), proceed (2), allowed (2), inconsistent (2), overlapping (2), spaces (2), now (2), tend (2), pipt (2), homonyms (2), designed (2), exist (2), potential (2), additionally (2), avoids (2), slow (2), divided (2), held (2), running (2), cut (2), dependent (2), measurement (2), indicates (2), marked (2), implies (2), field (2), hence (2), displaystyle (2), lceil (2), rceil (2), ratio (2), contributes (2), conflicts (2), tests (2), something (2), good (2), suffer (2), hand (2), unpredictable (2), acts (2), free (2), place (2), execute (2), independent (2), waits (2), hundreds (2), able (2), steps (2), immediately (2), rarely (2), future (2), contain (2), copied (2), etc (2), static (2), executable (2), step (2), appearance (2), upload (2), create (2), account (2), donate (2), menu (2), add, cookie, statement, statistics, developers, conduct, legal, safety, contacts, disclaimers, text, under, apply, site, you, agree, registered, trademark, profit, foundation, inc, creative, attribution, sharealike, license, rendered, parsoid, edited, 2026, utc, hidden, webarchive, template, volume, disputes, errors, parameters, https, php, title, cpu_cache, oldid, 1372368516, carrier, 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ram 9 implementation toggle implementation subsection 9 1 history 9 1 1 first tlb implementations 9 1 2 first instruction cache 9 1 3 first data cache 9 1 4 in 68k microprocessors 9 1 5 in x86 microprocessors 9 1 6 in arm microprocessors 9 1 7 current research 9 2 multi ported cache 10 see also 11 notes 12 references 13 external links toggle the table of contents cpu cache 31 languages العربية български भोजपुरी català čeština deutsch español eesti فارسی français gaeilge bahasa indonesia italiano 日本語 한국어 lietuvių latviešu македонски മലയാളം nederlands norsk bokmål polski português русский slovenčina српски srpski தமிழ் türkçe українська tiếng việt 中文 edit links article talk english read edit view history tools tools move to sidebar hide actions read edit view history general what links here related changes upload file permanent link page information cite this page get shortened url switch to legacy parser print export download as pdf printable version in other projects wikimedia commons wikidata item appearance move to sidebar hide from wikipedia the free encyclopedia hardware cache of a central processing unit a cpu cache is a hardware cache used by the central processing unit cpu of a computer to reduce the average cost time or energy to access data from the main memory 1 a cache is a smaller faster memory located closer to a processor core which stores copies of the data from frequently used main memory locations avoiding the need to always refer to main memory which may be tens to hundreds of times slower to access cache memory is typically implemented with static random access memory sram which requires multiple transistors to store a single bit this makes it expensive in terms of the area it takes up and in modern cpus the cache is typically the largest part by chip area the size of the cache needs to be balanced with the general desire for smaller chips which cost less some modern designs implement some or all of their cache using the physically smaller edram which is slower to use than sram but allows larger amounts of cache for any given amount of chip area most cpus have a hierarchy of multiple cache levels l1 l2 often l3 and rarely even l4 with separate instruction specific i cache and data specific d cache caches at level 1 2 the different levels are implemented in different areas of the chip l1 is located as close to a cpu core as possible and thus offers the highest speed due to short signal paths but requires careful design l2 caches are physically separate from the cpu and operate slower but place fewer demands on the chip designer and can be made much larger without impacting the cpu design l3 caches are generally shared among multiple cpu cores other types of caches exist that are not counted towards the cache size of the most important caches mentioned above such as the translation lookaside buffer tlb which is part of the memory management unit mmu which most cpus have input output sections also often contain data buffers that serve a similar purpose overview edit to access data in main memory a multi step process is used and each step introduces a delay for instance to read a value from memory in a simple computer system the cpu first selects the address to be accessed by expressing it on the address bus and waiting a fixed time to allow the value to settle the memory device with that value normally implemented in dram holds that value in a very low energy form that is not powerful enough to be read directly by the cpu instead it has to copy that value from storage into a small buffer which is connected to the data bus it then waits a certain time to allow this value to settle before reading the value from the data bus by locating the memory physically closer to the cpu the time needed for the buses to settle is reduced and by replacing the dram with sram which hold the value in a form that does not require amplification to be read the delay within the memory itself is eliminated this makes the cache much faster both to respond and to read or write sram however requires anywhere from four to six transistors to hold a single bit depending on the type whereas dram generally uses one transistor and one capacitor per bit which makes it able to store much more data for any given chip area implementing some memory in a faster format can lead to large performance improvements when trying to read from or write to a location in the memory the processor checks whether the data from that location is already in the cache if so the processor will read from or write to the cache instead of the much slower main memory many modern desktop server and industrial cpus have at least three independent levels of caches l1 l2 and l3 and different types of caches translation lookaside buffer tlb used to speed up virtual to physical address translation for both executable instructions and data a single tlb can be provided for access to both instructions and data or a separate instruction tlb itlb and data tlb dtlb can be provided however the tlb cache is part of the memory management unit mmu and not directly related to the cpu caches instruction cache i cache used to speed executable instruction fetch some specialized versions include micro operation caches and branch target instruction caches data cache d cache used to speed data fetch and store higher level caches caches above the i cache and d cache are usually organized as a hierarchy of more cache levels l2 l3 etc see also multi level caches below history edit motherboard of a nextcube computer 1990 at the lower edge of the image left from the middle there is the cpu motorola 68040 operated at 25 mhz with two separate level 1 caches of 4 kib each on the chip one for the instructions and one for data the board has no external l2 cache early examples of cpu caches include the atlas 2 3 and the ibm system 360 model 85 4 5 in the 1960s the first cpus that used a cache had only one level of cache unlike later level 1 cache it was not split into l1d for data and l1i for instructions split l1 cache started in 1976 with the ibm 801 cpu 6 7 became mainstream in the late 1980s and in 1997 entered the embedded cpu market with the armv5te as of 2015 even sub dollar socs split the l1 cache they also have l2 caches and for larger processors l3 caches as well the l2 cache is usually not split and acts as a common repository for the already split l1 cache every core of a multi core processor has a dedicated l1 cache and is usually not shared between the cores the l2 cache and lower level caches may be shared between the cores l4 cache is currently uncommon and is generally dynamic random access memory dram on a separate die or chip rather than static random access memory sram an exception to this is when edram is used for all levels of cache down to l1 historically l1 was also on a separate die however bigger die sizes have allowed integration of it as well as other cache levels with the possible exception of the last level each extra level of cache tends to be smaller and faster than the lower levels 8 caches like for ram historically have generally been sized in powers of 2 4 8 16 etc kib when up to mib sizes i e for larger non l1 very early on the pattern broke down to allow for larger caches without being forced into the doubling in size paradigm with e g intel core 2 duo with 3 mib l2 cache in april 2008 this happened much later for l1 caches as their size is generally still a small number of kib the ibm zec12 from 2012 is an exception however to gain unusually large 96 kib l1 data cache for its time and e g the ibm z13 having a 96 kib l1 instruction cache and 128 kib l1 data cache 9 and intel ice lake based processors from 2018 having 48 kib l1 data cache and 48 kib l1 instruction cache in 2020 some intel atom cpus with up to 24 cores have multiple of 4 5 mib and 15 mib cache sizes 10 11 operation edit cache entries edit data is transferred between memory and cache in blocks of fixed size called cache lines or cache blocks when a cache line is copied from memory into the cache a cache entry is created the cache entry will include the copied data as well as the requested memory location called a tag when the processor needs to read or write a location in memory it first checks for a corresponding entry in the cache the cache checks for the contents of the requested memory location in any cache lines that might contain that address if the processor finds that the memory location is in the cache a cache hit has occurred however if the processor does not find the memory location in the cache a cache miss has occurred in the case of a cache hit the processor immediately reads or writes the data in the cache line for a cache miss the cache allocates a new entry and copies data from main memory then the request is fulfilled from the contents of the cache policies edit replacement policies edit main article cache replacement policies to make room for the new entry on a cache miss the cache may have to evict one of the existing entries the heuristic it uses to choose the entry to evict is called the replacement policy the fundamental problem with any replacement policy is that it must predict which existing cache entry is least likely to be used in the future predicting the future is generally difficult so there is no perfect method to choose among the variety of replacement policies available one popular replacement policy least recently used lru replaces the least recently accessed entry marking some memory ranges as non cacheable can improve performance by avoiding caching of memory regions that are rarely re accessed this avoids the overhead of loading something into the cache without having any reuse cache entries may also be disabled or locked depending on the context write policies edit main article cache computing writing policies if data are written to the cache at some point they must also be written to main memory the timing of this write is known as the write policy in a write through cache every write to the cache causes a write to main memory alternatively in a write back or copy back cache writes are not immediately mirrored to the main memory with locations been written over being marked as dirty being written back to the main memory only when they are evicted from the cache for this reason a read miss in a write back cache may sometimes require two memory accesses to service one to first write the dirty location to main memory and then another to read the new location from memory also a write to a main memory location that is not yet mapped in a write back cache may evict an already dirty location thereby freeing that cache space for the new memory location there are intermediate policies as well the cache may be write through but the writes may be held in a store data queue temporarily usually so multiple stores can be processed together which can reduce bus turnarounds and improve bus utilization cached data from the main memory may be changed by other entities e g peripherals using direct memory access dma or another core in a multi core processor in which case the copy in the cache may become out of date or stale alternatively when a cpu in a multiprocessor system updates data in the cache copies of data in caches associated with other cpus become stale communication protocols between the cache managers that keep the data consistent are known as cache coherence protocols cache performance edit cache performance measurement has become important in recent times where the speed gap between the memory performance and the processor performance is increasing exponentially the cache was introduced to reduce this speed gap thus knowing how well the cache is able to bridge the gap in the speed of processor and memory becomes important especially in high performance systems the cache hit rate and the cache miss rate play an important role in determining this performance to improve the cache performance reducing the miss rate becomes one of the necessary steps among other steps decreasing the access time to the cache also gives a boost to its performance and helps with optimization cpu stalls edit the time taken to fetch one cache line from memory read latency due to a cache miss matters because the cpu will run out of work while waiting for the cache line when a cpu reaches this state it is called a stall as cpus become faster compared to main memory stalls due to cache misses displace more potential computation modern cpus can execute hundreds of instructions in the time taken to fetch a single cache line from main memory various techniques have been employed to keep the cpu busy during this time including out of order execution in which the cpu attempts to execute independent instructions after the instruction that is waiting for the cache miss data another technology used by many processors is simultaneous multithreading smt which allows an alternate thread to use the cpu core while the first thread waits for required cpu resources to become available associativity edit main article cache placement policies an illustration of different ways in which memory locations can be cached by particular cache locations the placement policy decides where in the cache a copy of a particular entry of main memory will go if the placement policy is free to choose any entry in the cache to hold the copy the cache is called fully associative at the other extreme if each entry in the main memory can go in just one place in the cache the cache is direct mapped many caches implement a compromise in which each entry in the main memory can go to any one of n places in the cache and are described as n way set associative 12 for example the level 1 data cache in an amd athlon is two way set associative which means that any particular location in main memory can be cached in either of two locations in the level 1 data cache choosing the right value of associativity involves a trade off if there are ten places to which the placement policy could have mapped a memory location then to check if that location is in the cache ten cache entries must be searched checking more places takes more power and chip area and potentially more time on the other hand caches with more associativity suffer fewer misses see conflict misses so that the cpu wastes less time reading from the slow main memory the general guideline is that doubling the associativity from direct mapped to two way or from two way to four way has about the same effect on raising the hit rate as doubling the cache size however increasing associativity more than four does not improve hit rate as much 13 and are generally done for other reasons see virtual aliasing some cpus can dynamically reduce the associativity of their caches in low power states which acts as a power saving measure 14 in order of worse but simple to better but complex direct mapped cache good best case time but unpredictable in the worst case two way set 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