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sor news products research uncategorized recent posts sandia national labs sa3000 8085 cpu the forgotten ones actron am1608 16 bit cpu the general automation ga 16 16 bit cpu unknown and unobtainable mystery chips soviet s first planar integrated circuits popular articles links how a cpu is made amd 29k reference guide mergers aquisitions spin offs k6 2 cpu id guide via c3 cpu overview uli m6117c embedded 80386sx overclocking eastern bloc cpu guide cpu socket id guide mediagx and geode cpu guide cyrix id cpu guide intel rapidcad cpu datasheet archive july 2nd 2017 by admin itt an alq 136 countermeasures processor bit slice with a bite itt 80063sm a 919797 an alq 136 v i processor the 2901b s are the 4 larger dies in a row middle right military computing applications require many custom designs as they are very mission specific a great example is this itt hybrid processor it was designed and used for the an alq 136 v 1 cms countermeasures system for the ah 1f cobra attack helicopter two of these hybrids are used in the system one for the mod recovery board and one for the slo processor board these boards are used to detect hostile pulse radar systems analyze them and begin jamming based on what type they are this requires relatively fast processing and a generally custom design today a modern dsp processor could handle this task without issue however in the early 80 s the an alq 136 debuted in 1982 dsp processors were in their infancy in 1982 a fast custom processor needed to be built with bit slice elements in this case the very versatile amd 2901 was used the itt hybrid integrates 4 amd am2901b processor dies as well as associated memory and interfacing elements the single package contains almost 100 dies and many discrete components it is built on a ceramic substrate with gold traces and sealed in a metal package this is required to protect the digital components of the system from electronic interference whether from external sources or from the helicopters own radar systems the an alq 136 is designed to prevent the cobra from being successfully targeted by radar guided missiles failure means a strong possibility that the helicopter gets hit not something its crew would like to deal with 4x amd am2901b dies the 4 amd 2901bs run at 16mhz 50 faster then the original 2901s and are made with ecl together they provide 16 bit processing of the incoming radar signals the slo side lobe opposition and mod recovery modulation recovery are used to determine the exact type of the enemy radar each radar has a distinct characteristic that the cms can match and respond to the cms is programmed to respond to the radar signals of the most critical threat weapon systems anticipated to be encoun israeli ah 1f cobras now retired transferred to jordan tered in the hostile environment these signatures are stored in the hybrids roms as well as the desired response to them updates likely remain replacing these hybrids with updated versions new countermeasures systems such as the 136 s replacement the an alq 211 are more easily upgradeable to new threats the ah 1f cobra continues to fly with the air forces of several countries around the world notably pakistan jordan and turkey the united states forest service also operates 25 ah 1f cobras for wildland fire use but it is rather unlikely that the countermeasures on these are operable let alone needed tags 2901 amd bit slice mcm military posted in cpu of the day september 6th 2015 by admin the electronika mk1 red3 pdp 11 chipset and tetris soviet electronika mk1red3 f 11 clone and implementation of pdp 11 the dec f 11 fonz implementation of the pdp 11 was released in 1979 and was dec s second lsi implementation of the pdp like its predecessor it was a multi chip implementation consisting at its root of a data chip dc302 and 1 9 control chips dc303 the dc303 control chips were essentially a large rom pla with a few extra features added for interrupts and sequencing they formed the microcoded instruction set that drove the 16 bit alu and registers of the dc302 this is why more then one were supported expanding the instruction set was as simple as adding more dc303 chips with these instructions encoded the basic lsi11 23 came with one 303 and one 302 a second ic could be added to support floating point which included a pair of dc303 chips implementing the floating point instructions a mmu dc304 was also supported and required when using the fp option dec 570000101a1 f11 floating point option with 2x 303e control chips the soviets also widely adopted the pdp 11 architecture likely because it was designed to be rather hardware independent it could be implemented in many different ways which meant the soviets could adopt implement it on their own electronika was part of the soviet industrial complex in voronezh russia making many different ic s but also was tasked with making consumer devices computers and calculators etc that were in very short supply the electronika 60 was one of the first pdp 11 computers they made and it implemented a copy of the dec fonz processor electronika combined the standard chipset and fpu onto a single large mcm with all 4 ic s the mmu remained separate called the mk1 red1 and later the mk1 red3 tetris electronika 60 text only kh1811vm1 dc302 21 15541 data chip 16 bit alu etc kh1811vu1 dc303 23 001c7 standard instruction set kh1811vu2 dc303 23 002c7 fp instruction set part 1 kh1811vu3 dc303 23 003c7 fp instruction set part 2 it was on this chipset on a soviet electronika 60 that alexey pajitnov wrote the very first version of the still famous game of tetris back in 1984 a game that was very popular and very widely copied in the west even to this day the copying of technology most certainly went both ways tags f 11 mcm pdp 11 soviet posted in cpu of the day august 10th 2014 by admin an interesting fujitsu mcm pentium module fujitsu mrn 3545 100 100mhz pentium with no l2 cache we have seen fujitsu mcm pentiums before 120mhz 133mhz 150mhz and mmx ones one is pictured in the article on the micromodule systems gemini here the 100mhz module is similar though it is missing the l2 cache tag ram 256 kbit chip on the top of the package as well as the 2 cache ram chips normally installed on the backside of the module it would appear that fujitsu offered these modules with the cache being optional there was a 133mhz version mrn 3548 with cache and one mrn 3549 without cache these processors were typically used in environmentally challenging environments panasonic famously used them in their toughbook cf25 the beginning of a line of highly durable laptop in 1996 some of these applications were sealed environments they did not have vents or active cooling this obviously makes cooling a challenge removing the l2 cache while causing a significant hit in performance would alleviate some of the heat generation we consider l2 cache to be essential but many applications do not require it intel infamously removed the l2 cache completely from the first celeron processors and while they worked they were not particularly competitive performance wise when competing against wind rain dirt and droppage l2 cache may not be so important tags fujitsu mcm pentium posted in cpu of the day march 11th 2014 by admin ibm z800 mcm mainframe processor ibm z800 mcm mainframes are the workhorses of the computing industry they process transactions for about every industry and handle the brunt of the economy their mtbf mean time between failures is measured in decades typically 20 50 years a comparison to a home computer is hard to make they are in an entirely different league playing an entirely different game data intense vs cpu intense mainframe processors such as these work in what is referred to as data intensive computing environments this is different from multi cored processing that focuses on cpu intensive computing cpu intense has a relatively small data set but most perform a lot of work on that set of data or do the same instruction on a set of data such as graphics cpu intense processing can often be sped up with the addition of more processing cores data intense processing does not see as much benefit from adding cores its biggest bottleneck is accessing the data thus the system z tends to have very large caches and very high bandwidth memory they typically operate on transactional type data where the processing has to operate in a certain order a has to be done before b which has to finish before c etc ibm was one of the first and continues to be one of the largest suppliers of such systems starting with the system 360 introduced in 1964 to the zseries today the zseries was first launched in 2000 with the z900 a significant upgrade from the system 390 data addressing was moved to 64 bits from 31 bits yet backwards compatibility all the way back to the 360 is maintained the z900 ran at 775mhz and was built with a 35 die mcm containing 20 processing units pus and 32mb of l2 cache read more tags ibm mcm posted in cpu of the day february 18th 2014 by admin cpu of the day ibm power5 qcm ibm power5 qcm 4 dies 8 cores and 72mb of l3 cache when the power5 processor was released in 2004 it was made in two versions a dcm dual chip module containing a power5 die and its 36mb l3 cache die as well as a mcm containing 4 power5 die and 4 l3 cache dies totaling 144mb the power5 is a dual core processor thus the dcm was a dual core and the mcm an 8 core processor the power5 contains 276 million transistors and was made on a 130nm cmos9s process in 2005 ibm shrank the power5 onto a 90nm cmos10s manufacturing process resulting in the power5 this allowed speeds to increase to 2 3ghz from the previous max of 1 9ghz the main benefit from the process shrink was less power draw and thus less heat this allowed ibm to make the power5 in a qcm quad chip module as well as the previous form factors the qcm ran at up to 1 8ghz and contained a pair of power5 dies and 72mb of l3 cache the power5 was more then a die shrink ibm reworked much of the power5 to improve performance adding new floating point instructions doubling the tlb size improved smp support and an enhanced memory controller to mention just a few the result a much improved processor and a very fine looking qcm tags ibm mcm power posted in cpu of the day august 8th 2013 by admin how to disassembling an ibm power4 mcm the ibm power4 was released in 2001 it was a 1 1 1 9ghz dual core processor widely used in ibm s server line including the rs 6000 and as 400 it can be commonly found as a single chip dual core but also as a large mcm containing 4 power4 dies these mcms include a very large and heavy aluminium heatsink attached to a solid copper housing the complete unit weighs in at a hefty 3kg the heatsink and housing can be removed revealing a 230 gram mcm with its small heat spreaders to disassemble one of these you will need a variety of tools a 4 mm socket hex bits 2 5 3 and 4mm t8 torx bit a medium flat tip screw driver gloves and a good heat source i use a propane torch first remove the 4 t8 torx screws that hold the interposer to the module it gets in the way and can melt easily also remove the 8 3mm screws around the perimeter these hold the aluminium heatsink to the copper housing read more tags ibm mcm power4 posted in how to march 13th 2013 by admin ibm 3081 tcm miniature pendant ibm 3081 tcm pendant a few times i get things that are not processors but are memorabilia and are pretty special nonetheless today these nice ibm pendants came in they are very small measuring barely 37mm square but they weigh an impressive 60 grams they are a near perfect miniature version of a not so miniature ibm tcm thermal conduction module the 3081 tcm contained the cooling and a very large mcm used in the 308x mainframe series made from 1980 1987 each mcm contained up to 133 dies on a very large ceramic substrate with up to 16 000 contacts for the dies they were capable of speeds of up to 38mhz each tcm was liquid cooled and dissipated around 300 watts of heat a typical 308x system had 2 dozen of these a similar ibm mcm can be seen here a 9121 processor tags ibm mcm posted in just for fun february 7th 2013 by admin cpu of the day unknown ibm mcm any ideas click for much larger every now and then i will get a chip in that i cannot id this is a particularly perplexing one it looks like it should be something fairly well known but i cannot determine what by the dates its a 2005 vintage ibm mcm on a fairly large ceramic package with 1077 lands it contains a pair of infineon hyb39s256160dt 7 256mbit 4mbitx16bit drams which are 7ns 143mhz max commonly used on pc133 sdram that works out to 64mb also on the package is a ibm0436a8aclab 8mbit 256kx36 4 5ns 222mhz 1mbyte sram ibm mcm die markings on the die are 0fe45000l3 akesxex0 1 10 10 09k2262 if you have any ideas what it is or what it may be post a comment i may just give you one these came in with a lot of hp pa risc processors so perhaps related update 10 20 2016 mystery solved these are processors from a cadence palladium emulator system read more about them here tags ibm mcm posted in cpu of the day december 3rd 2012 by admin gpu of the day sgi ge7 geometry engine sgi extreme 4ge7mcm 256 mflops 320 000 gates at 2 6oz 75 grams and 2 25 inches square 6cm the sgi 4ge7mcm is a beast of a graphics chip more properly called a geometry engine was the ge7 was responsible for all the graphics processing in sgi indigo 2 workstations the indigo 2 extreme graphics option consisted of a pair of these mcms multi chip module each one contains 4 ge7 geometry engines providing 32mflops of performance each each ge7 consists of a custom 80 000 gate array from lsi for a total of 320 000 gates and 128mflops per mcm this performance level was ironically better then the main system cpu 35mflops for the 200mhz r4400 option each of the black caps on the chip covers a single ge7 engine a similar design was used for the xz graphics system that had only 4 total ge7 cores this was either implemented with 2 of the large mcms that had only 2 ge7s in them same package however that were marked 2ge7mcm or later a single surface mount mcm containing 4 ge7 engines all were manufactured by lsi in total the extreme graphics subsystem had no less then 31 custom gate arrays from lsi for a total of over 1 2 million gates at an average of 2 transistors per gate that works out to around 2 5 million transistors a considerable amount for a graphics system in 1993 today s graphics chips pack in transistors numbering in the billions the geforce gtx 680 has a total of 3 54 billion transistors and performance measured in tflops again for the gtx 680 3 09tflops today s graphics chips cannot however compete with the magnificent looks of the ge7 s giant mcm package sources indigo 2 product guide pdf indigo 2 technical report tags lsi mcm sgi posted in gpu september 21st 2012 by admin cpu of the day micromodule systems pentium gemini micromodule systems gv1 d0 3s 60 1...
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