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mmx instruction set wikipedia jump to content main menu main menu move to sidebar hide navigation main page contents current events random article about wikipedia contact us contribute help learn to edit community portal recent changes upload file special pages search search appearance donate create account log in personal tools donate create account log in contents move to sidebar hide top 1 overview toggle overview subsection 1 1 naming 1 2 technical details 1 3 hardware support 1 4 software support 2 successors 3 mmx in embedded applications 4 see also 5 references 6 external links toggle the table of contents mmx instruction set 25 languages العربية български català čeština deutsch español فارسی français galego magyar bahasa indonesia italiano 日本語 한국어 nederlands norsk bokmål polski português русский slovenčina svenska türkçe українська 粵語 中文 edit links article talk english read edit view history tools tools move to sidebar hide actions read edit view history general what links here related changes upload file permanent link page information cite this page get shortened url switch to legacy parser print export download as pdf printable version in other projects wikidata item appearance move to sidebar hide from wikipedia the free encyclopedia instruction set designed by intel pentium with mmx mmx is a single instruction multiple data simd instruction set architecture extension designed by intel introduced on january 8 1997 1 2 with its pentium p5 microarchitecture based line of microprocessors named pentium with mmx technology 3 it developed out of a similar unit introduced on the intel i860 4 and earlier the intel i750 video pixel processor mmx is a processor supplementary capability that is supported on ia 32 processors by intel and other vendors as of 1997 update amd also added mmx instruction set in its k6 processor the new york times described the initial push including super bowl advertisements as focused on a new generation of glitzy multimedia products including videophones and 3 d video games 5 mmx has subsequently been extended by several programs by intel and others 3dnow streaming simd extensions sse and ongoing revisions of advanced vector extensions avx overview edit naming edit mmx is officially a meaningless initialism 6 trademarked by intel 7 unofficially the initials have been variously explained as standing for multimedia extension 1 or matrix math extension 8 advanced micro devices amd during one of its many court battles with intel produced marketing material from intel indicating that mmx stood for matrix math extensions citation needed since an initialism cannot be trademarked citation needed this was an attempt to invalidate intel s trademark in 1995 intel filed suit against amd and cyrix corp for misuse of its trademark mmx amd and intel settled with amd acknowledging mmx as a trademark owned by intel and with intel granting amd rights to use the mmx trademark as a technology name but not a processor name 9 also the mmx term is sometimes confused with the separate multimedia extensions api on windows 3 x and windows 9x technical details edit pentium ii processor with mmx technology mmx defines eight processor registers named mm0 through mm7 and operations that operate on them each register is 64 bits wide and can be used to hold either 64 bit integers or multiple smaller integers in a packed format one instruction can then be applied to two 32 bit integers four 16 bit integers or eight 8 bit integers at once 10 mmx provides only integer operations when originally developed for the intel i860 the use of integer math made sense both 2d and 3d calculations required it but as graphics cards that did much of this became common integer simd in the cpu became somewhat redundant for graphical applications citation needed alternatively the saturation arithmetic operations in mmx could vague significantly speed up some digital signal processing applications citation needed to avoid compatibility problems with the context switch mechanisms in existing operating systems the mmx registers are aliases for the existing x87 floating point unit fpu registers which context switches would already save and restore unlike the x87 registers which behave like a stack the mmx registers are each directly addressable random access any operation involving the floating point stack might also affect the mmx registers and vice versa so this aliasing makes it difficult to work with floating point and simd operations in the same program 11 to maximize performance software often used the processor exclusively in one mode or the other deferring the relatively slow switch between them as long as possible each 64 bit mmx register corresponds to the mantissa part of an 80 bit x87 register the upper 16 bits of the x87 registers thus go unused in mmx and these bits are all set to ones making them not a number nan data types or infinities in the floating point representation this can be used by software to decide whether a given register s content is intended as floating point or simd data hardware support edit amd since amd k6 12 centaur technology since idt winchip c6 cyrix since cyrix 6x86mx 12 intel since intel pentium mmx 13 rise technology rise mp6 transmeta since transmeta crusoe software support edit software support for mmx developed slowly 5 intel s c compiler and related development tools obtained intrinsics for invoking mmx instructions and intel released libraries of common vectorized algorithms using mmx both intel and metrowerks attempted automatic vectorization in their compilers but the operations in the c programming language mapped poorly onto the mmx instruction set and custom algorithms as of 2000 typically still had to be written in assembly language 11 successors edit amd a competing x86 microprocessor vendor enhanced intel s mmx with their own 3dnow instruction set 3dnow is best known for adding single precision 32 bit floating point support to the simd instruction set among other integer and more general enhancements following mmx intel s next major x86 extension was the streaming simd extensions sse introduced with the pentium iii family 14 in 1999 15 roughly a year after amd s 3dnow was introduced sse addressed the core shortcomings of mmx inability to mix integer simd ops with any floating point ops by creating a new 128 bit wide register file xmm0 xmm7 and new simd instructions for it like 3dnow sse focused exclusively on single precision floating point operations 32 bit integer simd operations were still performed using the mmx register and instruction set however the new xmm register file allowed sse simd operations to be freely mixed with either mmx or x87 fpu ops streaming simd extensions 2 sse2 introduced with the pentium 4 further extended the x86 simd instruction set with integer 8 16 32 bit and double precision floating point data support for the xmm register file sse2 also allowed the mmx operation codes opcodes to use xmm register operands extended to even wider ymm and zmm registers by later sse revisions mmx in embedded applications edit intel s and marvell technology group s xscale microprocessor core starting with pxa270 include an simd instruction set architecture extension to the arm architecture core named intel wireless mmx technology iwmmxt which functions are similar to those of the ia 32 mmx extension 16 17 18 it provides arithmetic and logic operations on 64 bit integer numbers in which the software may choose to instead perform two 32 bit four 16 bit or eight 8 bit operations in one instruction the extension contains 16 data registers of 64 bits and eight control registers of 32 bits all registers are accessed through standard arm architecture coprocessor mapping mechanism iwmmxt occupies coprocessors 0 and 1 space and some of its opcodes clash with the opcodes of the earlier floating point extension fpa citation needed later versions of marvell s arm processors support both wireless mmx wmmx and wireless mmx2 wmmx2 opcodes see also edit extended mmx altivec equivalent on powerpc architecture references edit 1 2 makers unveil pcs with intel s mmx chip the new york times january 9 1997 archived from the original on january 13 2019 retrieved january 13 2019 intel s new multimedia extension technology called mmx ch rajiv rasekaran january 8 1997 intel to unveil faster pentium chip the washington post archived from the original on january 14 2019 retrieved january 13 2019 embedded pentium processors with mmx technology intel archived from the original on august 11 2010 retrieved july 28 2007 mittal millind peleg alex weiser uri 1997 mmx technology architecture overview pdf intel technology journal 1 3 archived pdf from the original on march 4 2016 retrieved october 29 2015 1 2 calem robert e january 24 1997 intel s mmx the technology behind the hoopla the new york times archived from the original on january 13 2019 retrieved january 13 2019 tanaka jennifer february 16 1997 a new chip off the block newsweek archived from the original on august 31 2019 retrieved august 31 2019 the name which doesn t stand for anything intel data center solutions iot and pc innovation archived from the original on december 17 2013 retrieved december 17 2013 zhang peng january 1 2010 chapter 5 microprocessors advanced industrial control technology 12 mmx technology william andrew publishing pp 155 214 isbn 978 1 4377 7807 6 retrieved june 2 2024 cite book cs1 maint location link intel and advance micro agree on chip trademark the new york times april 22 1997 archived from the original on january 13 2019 retrieved january 13 2019 pfeiffer joseph j jr 1997 mmx microarchitecture of pentium processors with mmx technology and pentium ii microprocessors pdf intel technology journal archived from the original pdf on january 12 2011 retrieved september 1 2017 1 2 conte g tommesani s zanichelli f 2000 the long and winding road to high performance image processing with mmx sse pdf proceedings of ieee international workshop on computer architectures for machine perception archived from the original pdf on january 28 2016 1 2 paul herrmann rechnerarchitektur vieweg 2002 seite 417 intel pentium mmx prozessoren auf cpu collection de kay alan s february 26 1999 pentium iii buy the numbers the washington post archived from the original on april 15 2019 retrieved january 13 2019 microprocessor hall of fame intel museum archived from the original on april 6 2008 intel brings mmx technology to intel personal internet client architecture based wireless devices retrieved july 28 2022 intel delivers next generation processors specifically designed for cell phones and wireless pdas archived from the original on january 2 2012 retrieved july 28 2022 world s smallest pxa270 embedded cpu card ee times september 15 2004 retrieved july 28 2022 external links edit intel intrinsics guide intel pentium processor with mmx technology documentation ia software developer s manual vol 1 pdf see chapter 8 for mmx programming v t e intel technology platforms centrino centrino 2 viiv mid tablet culv ultrabook skulltrail nuc galileo edison curie evo discontinued common building block multiprocessor specification intel communication streaming architecture intel inboard 386 intel play mobile module connector mmc 1 mmc 2 current advanced programmable interrupt controller cnvi intel turbo boost vpro intel secure key intel management engine active management technology amt versions high bandwidth digital content protection high definition audio hub architecture rapid storage technology speedstep serial digital video out host embedded controller interface hyper threading omni path platform environment control interface quickpath interconnect platform controller hub system management bus thunderbolt ultra path interconnect upcoming silicon photonics link v t e instruction set extensions simd risc alpha mvi arm neon sve mips mdmx mips 3d mxu mips simd pa risc max power isa vmx sparc vis simd x86 mmx 1996 3dnow 1998 sse 1999 sse2 2001 sse3 2004 ssse3 2006 sse4 2006 sse5 2007 avx 2008 f16c 2009 xop 2009 fma fma4 2011 fma3 2012 avx2 2013 avx 512 2015 amx 2022 avx10 2023 bit manipulation bmi abm 2007 bmi1 2012 bmi2 2013 tbm 2012 adx 2014 compressed instructions thumb mips16e ase rvc security and cryptography padlock 2003 aes ni 2008 armv8 also has aes instructions clmul 2010 rdrand 2012 sha 2013 mpx 2015 sgx 2015 tdx 2021 transactional memory tsx 2013 asf virtualization vt x 2005 amd v 2006 amd vi vt d 2011 general purpose registers amd64 1999 apx 2023 suspended extensions dates are struck through authority control databases national united states france bnf data israel other idref retrieved from https en wikipedia org w index php title mmx_ instruction_set oldid 1346160515 categories computer related introductions in 1997 simd computing x86 instructions instruction set extensions hidden categories articles with short description short description matches wikidata use mdy dates from october 2018 articles containing potentially dated statements from 1997 all articles containing potentially dated statements cs1 maint location all articles with unsourced statements articles with unsourced statements from october 2022 articles with unsourced statements from january 2016 all wikipedia articles needing clarification wikipedia articles needing clarification from january 2016 articles with unsourced statements from july 2022 this page was last edited on 30 march 2026 at 07 51 utc page was rendered with parsoid text is available under the creative commons attribution sharealike 4 0 license additional terms may apply by using this site you agree to the terms of use and privacy policy wikipedia is a registered trademark of the wikimedia foundation inc a non profit organization privacy policy about wikipedia disclaimers contact wikipedia legal safety contacts code of conduct developers statistics cookie statement mobile view search search toggle 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